Laser Annealing Emerges as a Key Semiconductor Manufacturing Technology — Adoption Expands Across SiC, 400-Layer NAND, and HBM

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Silicon carbide power chips, 400-layer-plus NAND flash pushing the limits of vertical stacking, and HBM driving the AI revolution — three very different segments of the semiconductor industry are converging on the same manufacturing technology: laser annealing. The limitations of conventional furnace annealing are becoming apparent across all three —

in SiC’s high-temperature activation, NAND’s rising channel resistance, and HBM’s void formation during bonding — and laser annealing is emerging as a direct solution in each case.

What Is Laser Annealing?

In semiconductor fabrication, ion implantation introduces dopants into a substrate but also damages the crystal lattice in the process. Annealing repairs that damage thermally and electrically activates the dopants.

Conventional furnace annealing heats the entire wafer uniformly, whereas laser annealing delivers focused laser energy only to the area that needs treatment, for an extremely short duration. The result is precise processing with minimal thermal impact on surrounding structures. It is this combination of locality, speed, and low thermal budget that is now in demand across multiple advanced application areas.

SiC Power Semiconductors — Wolfspeed and Samsung Move Toward Adoption

SiC is rapidly gaining ground as the material of choice for power semiconductors in EVs, renewable energy systems, and industrial applications. Activating dopants in SiC can require temperatures exceeding 1,600°C — far higher than silicon — making conventional furnace annealing risky due to surface damage, interface defects, and mechanical stress. Laser annealing’s localized heating avoids these issues, making it well suited to SiC processing.

According to South Korean media outlet ETNews, Wolfspeed — the leading supplier in the SiC wafer market — is in discussions with a Korean equipment maker over a purchase order for laser annealing systems, with plans to expand deployment after an initial low-volume introduction. Samsung is also reportedly evaluating laser annealing as it prepares for mass production in its SiC foundry business, targeted for 2028. As the industry transitions to 8-inch and larger SiC wafers, the demand for uniform, repeatable thermal processing will only intensify.

400-Layer NAND — The Key Is Poly-Si Grain Size

3D NAND has scaled by stacking more layers, and Samsung has completed development of its 10th-generation V-NAND (V10) with over 400 layers, currently transferring the technology to its Pyeongtaek fab for mass production.

As layer counts grow, a critical challenge emerges in the channel hole — the vertical structure that penetrates the stacked memory cells and carries the electrical signal. The channel layer is made of polycrystalline silicon (Poly-Si), and as the stack gets taller, the channel length increases, raising channel resistance and reducing read current.

The fundamental solution is to increase the size of the crystal grains that make up the Poly-Si. Larger grains mean fewer grain boundaries, less electron scattering, and higher current flow.

Laser annealing can locally recrystallize the Poly-Si within the channel hole, effectively enlarging grain size without heating the entire structure. This targeted approach is particularly important for deep stacks where broad thermal treatment would risk damaging adjacent layers. ETNews reports that multiple NAND manufacturers are exploring the technology for devices exceeding 400 layers.

HBM and Hybrid Bonding — SK hynix Signs Equipment Contract with DIT

According to Korea Credit News, SK hynix has signed an advanced process equipment supply contract with South Korean supplier DIT for laser annealing systems, valued at KRW 15.87 billion (approximately USD 11.6 million), running through October 2026. Hybrid bonding — which connects dies through direct copper-to-copper contact without bumps — is expected to become standard beginning with HBM4. However, the process is prone to internal void formation during copper interconnection. Laser annealing is seen as a means to eliminate those voids while supporting more advanced stacking architectures, making it a concrete enabler for next-generation HBM production.

Advanced Logic and Market Outlook

ETNews further reports that chipmakers are exploring localized annealing for advanced logic manufacturing at 2nm and below. At these nodes, process margins are razor-thin, and any technique that reduces thermal damage to delicate structures carries a distinct advantage.

The market reflects this expanding demand. The SiC laser annealing equipment market was estimated at around USD 150 million in 2024 and is forecast to grow at a CAGR of approximately 8–8.5% through the 2030s. The broader laser annealing equipment market is estimated at roughly USD 887 million in 2026, with projections pointing toward USD 1.3 billion by 2035.

Conclusion

Laser annealing is gaining traction across SiC, NAND, and HBM for a common reason: each application demands precise, localized, minimal-heat processing that conventional furnace annealing cannot reliably deliver. The concrete moves by Wolfspeed, Samsung, and SK hynix signal that this technology is transitioning from a niche process step to a standard tool in next-generation semiconductor manufacturing.

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